1. Field of the Invention
The invention relates to a poly fuse trimming circuit and, in particular, to a poly fuse trimming circuit with a silicon controlled rectifier (SCR) device.
2. Description of the Related Art
High precision resistors are critical for analog integrated circuit design. Process variation, however, is inevitable and thus poly fuse trimming technology is important.
FIG. 1 shows a schematic diagram of a conventional poly fuse trimming circuit. A poly fuse 101 is coupled between two pads 100 and 100′. When there is a voltage difference between the pads 100 and 100′, current flows through the poly fuse 101. If the voltage difference is large enough, a large current breaks the poly fuse 101. In such a circuit, the pad area is large and therefore not cost effective. In addition, it is not easy to trim a plurality of poly fuses at the same time.
FIG. 2 shows another conventional poly fuse trimming circuit. The poly fuse trimming circuit comprises a poly fuse F1 and a transistor MNO. The poly fuse F1 is coupled between a power supply potential VDD and a node N. The transistor MNO is coupled between the node N and a ground GND. Two inverters U1 and U2 are connected in series to a gate of the transistor MNO. The inverter U1 receives a trimming signal TRIM. When the trimming signal TRIM turns on the transistor MNO via the inverters U1 and U2, current flows through the poly fuse F1. If the current is large enough, the poly fuse F1 is broken. In such a circuit, the transistor MNO needs to be large enough to sustain a large current such that the poly fuse Fl is broken before the transistor MNO is damaged. Thus, this circuit is not area (cost) effective.